Almost every computer built since 1970 stores its working memory the same way: one bit as a smear of electric charge on a tiny capacitor, with one transistor deciding when that charge can be touched. Robert Dennard worked it out at IBM in 1966. The patent was granted in 1968. Everything below — the prices, the shortages, the fact that three companies make nearly all of it — comes out of that one structural choice.
The choice was economy. A DRAM bit needs one transistor and one capacitor where the faster SRAM alternative needs four or six, so DRAM could be made dense and made cheap. The cost is that charge leaks. Every row has to be read and rewritten within about 64 milliseconds or the data is simply gone, which on a device with 8,192 rows means refreshing one row roughly every 7.8 microseconds, forever, whether or not anyone is using it. That is what the word dynamic in the name is doing.
Making one is largely a problem of building a capacitor that holds enough charge in almost no area. Manufacturers build it vertically — etched down into the silicon, or stacked upward over the transistor — with depth-to-width ratios that had already passed 50:1 by the mid-2000s. Shrinking the cell shrinks the capacitor, and by the 1z and 1-alpha generations capacitance had fallen under 10 femtofarads per cell against a floor of about 6 or 7 that manufacturers try to hold. That wall is why progress has slowed: node transitions now buy only 10 to 15% more density each, against the 40% Micron reported moving to 1-alpha in 2021.
Who makes it has changed twice, and both times a downturn did the choosing. Japanese firms held around 80% of the market in the 1980s on yields reported 20 to 30% better than American rivals; currency moves and trade agreements helped push the United States out of commodity memory, and Intel went to microprocessors instead. South Korea entered in 1983, reached the top of the market by 1992, and has not been displaced. The 1997 Asian crisis produced SK hynix; Japan answered with Elpida in 1999; the 2008 crisis took Qimonda; and Micron’s purchase of Elpida in 2013 closed the process. Three companies now hold about 95% of DRAM revenue.
That concentration is why this market moves in cycles rather than curves. A fab is committed years before it ships anything, so supply always arrives on a decision made in a different world — downturns in 2011, 2019 and 2022. What changed recently is discipline: the three survivors now cut production in a downcycle instead of expanding into it.
Which brings the story to now. High Bandwidth Memory, the stacked DRAM that feeds an AI accelerator, is made on the same wafers in the same fabs as the memory in a laptop, but consumes far more wafer area per usable bit and sells for five to ten times as much per bit. TrendForce projects HBM taking about 18%, 22% and 30% of DRAM wafer input at the ends of 2025, 2026 and 2027 while returning only about 8%, 9% and 13% of the bits. The gap between those two series is conventional memory that never gets made — and with no fourth supplier of consequence, it reprices memory for everyone.
What is genuinely contested, and what is missing, is set out beside each claim rather than hidden: the retrieved sources describe contract-price forecasts rather than settled transaction prices; IBM and IEEE Spectrum disagree by a year on when Dennard had the idea; and Micron's figures now come from its SEC-filed results, while the remaining manufacturing gaps include imec's peripheral-transistor platform, an open-access HfO₂ trench-capacitor paper that was only surfaced in search, and an EUV-in-DRAM conference presentation that has since been read in full, closing that gap.